“Group III nitride integration with CMOS technology,” U.S. Patent 9,362,281, issued June 7, 2016

“Group III nitride integration with CMOS technology,” U.S. Patent 9,331,076, issued May 3, 2016

“Engineered base substrates for releasing III-V epitaxy through spalling,” U.S. Patent 9,245,747, issued January 26, 2016

“Laser-initiated exfoliation of group iii-nitride films and applications for layer transfer and patterning,” U.S. Patent 9,236,271, issued January 12, 2016

“Selective gallium nitride regrowth on (100) silicon,” U.S. Patent 9,099,381, issued August 4, 2015

“Selective gallium nitride regrowth on (100) silicon,” U.S. Patent 9,059,075, issued June 16, 2015

“Light emitting diodes with via contact scheme,” U.S. Patent 9,059,339, issued June 16, 2015

“Controlled spalling of group III nitrides containing an embedded spall releasing plane,” U.S. Patent 9,058,990, issued June 16, 2015

“Heterogeneous integration of group iii nitride on silicon for advanced integrated circuits,” U.S. Patent 9,236,251, issued January 12, 2016

“Dual phase gallium nitride material formation on (100) silicon,” U.S. Patent 9,048,173, issued June 2, 2015